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Top 10 technology trends in the semiconductor industry in 2020

  • Categories:News Center
  • Time of issue:2021-01-26 11:04
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(Summary description)5G "scale" commercialization will drive the development of 5G mobile phones, base stations, VR/AR equipment, and emerging applications such as Industry 4.0, autonomous driving, and medical care

Top 10 technology trends in the semiconductor industry in 2020

(Summary description)5G "scale" commercialization will drive the development of 5G mobile phones, base stations, VR/AR equipment, and emerging applications such as Industry 4.0, autonomous driving, and medical care

  • Categories:News Center
  • Author:ASPENCORE global editors
  • Origin:
  • Time of issue:2021-01-26 11:04
  • Views:
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1. 5G "scale" commercialization will drive the development of 5G mobile phones, base stations, VR/AR equipment, and emerging applications such as Industry 4.0, autonomous driving, and medical care

5G is relative to 4G networks, just like China's high-speed rail is relative to traditional ordinary railways. High speed, low latency and large capacity are the salient features of 5G networks. 3GPP defines the three major technologies and applications of 5G, namely: Enhanced Mobile Broadband Communication (eMBB), mainly for 3D/ultra-high-quality video, VR/AR and other applications; Large-scale Machine Type Communication (mMTC), mainly for intelligence IoT applications such as wearables, smart homes, smart cities, Internet of Vehicles and Industrial Internet of Things; ultra-reliable and low-latency communications (uRLLC), mainly for high-reliability key applications such as autonomous driving, industrial automation and mobile medical. The increasing maturity of 5G technology and the large-scale commercial deployment of 5G networks will drive artificial intelligence (AI), huge amounts of data, and cloud computing in emerging video games, VR/AR, AIoT, autonomous driving, smart cities, and Industry 4.0 And the development and popularization of application fields such as medical imaging.

NXP wireless network solution introduction

In 2020, 5G will enter the large-scale commercial stage, which will first drive the rapid development, technological innovation and mass shipment of chips and electronic components for 5G mobile phones, wireless base stations and communication network systems, including: 5G mobile phone modems (Modem) And baseband chips, application processors (AP), GPU and AI accelerators, RF components and filters, image sensors/cameras, antennas and other components; because 5G networks work at higher frequencies (sub-6GHz ), the shortcomings of 5G base station signal attenuation and short transmission distance force operators to deploy and install at least 3 times the number of 4G base stations to achieve full coverage, which will drive baseband digital signal processing components, RF components, power amplifier components, and antennas , And the demand for power management components (5G base station power consumption is 2 to 3 times that of 4G).

The high-speed and low-latency characteristics of 5G networks can just solve the "poor user experience" pain points of VR/AR. The Chinese version of "Electronic Engineering Album" predicts that this will drive a new wave of VR/AR/MR. Facebook will invest heavily Develop head-mounted devices and even acquire chip companies to develop their own integrated hardware platforms; inspection operations in the power and manufacturing industries will deploy AR applications, and 5G networks can better provide remote information interaction and support; more than 30% of the exhibition scenes will provide VR/AR equipment, software, content and services; colleges and universities and training institutions will also use VR/AR for course training.

5G technology can also be individually networked for manufacturing companies, boosting the development of Industry 4.0, Industrial Internet of Things and industrial big data, while ensuring the security of corporate data. In addition, 5G will also drive the acceleration of the Internet of Vehicles and ADAS/autonomous driving, and provide high-speed, stable and safe data transmission for emerging applications such as remote medical and medical imaging.

2. The trend of computing “marginalization” empowers edge devices with more AI and computing capabilities, which not only provides more opportunities for SoC design companies, but also raises higher PPA requirements

The decentralization and fragmentation of IoT applications has put a lot of pressure on the transmission network bandwidth and cloud computing capabilities, forcing IoT terminal devices to have the ability to process data on-site. This demand drives the rise of edge computing and also The performance of the microprocessor at the core of the edge device is improved, and the AI ​​processing capability is also enhanced accordingly. Edge computing can collect and analyze data on IoT devices, make quick inferences (or decisions), and then send only a small amount of useful data to the cloud. In this way, its delay time, bandwidth consumption and cost will be reduced, and decisions can be made quickly based on data analysis. Even if the system is offline, edge computing can continue to operate, real-time data processing and determine which data should be sent to the cloud for further analysis.


As the heart of the edge or terminal equipment of the Internet of Things, SoC must not only have better performance, but also the power consumption and occupied area must be as low as possible, that is, the best PPA must be achieved. Traditional general-purpose MCU/MPU/CPU has been difficult to meet the requirements of different application scenarios and PPA. Only the innovation of technology and commercial model in the field of edge computing can release the potential of AI and computing power. In addition, different application scenarios have different requirements for software and AI algorithms. Although it is technically feasible to add AI inference functions on the edge side, a customized chip is needed to realize a processor with AI enhanced performance. Small and medium-sized enterprises and start-up companies focus more on application software and AI algorithms, while large and medium-sized companies pay more attention to the ecological construction of edge computing, such as Huawei's participation in or leading industry standard protocol formulation and software and hardware development environments.

In terms of IoT communication protocols, global telecom operators are pushing NB-IoT, especially in the Chinese market. LoRa, Zigbee, Bluetooth and other communication protocols also have their own development paths and main application areas, but the coexistence of multiple standards and protocols will be the current status of the Internet of Things market in the future. SoC design engineers and microprocessor developers must consider the compatibility and support of multiple protocols.

3. "Heterogeneous" integration of wafer manufacturing. Die at different process nodes are packaged through 2.5D/3D stacking technology, and chiplet may become a new IP for chip design and manufacturing in the post-Moore era

High-performance CPUs, smart phone APs, GPUs and FPGAs have always been the "early adopters" of the most advanced process nodes below 14nm. TSMC's 7nm process is currently the most advanced mass production technology. It is expected that the 5nm process will be replaced by the highest-end process in 2020. . In this process race, which is more expensive than building an aircraft carrier, only TSMC, Samsung and Intel are competing in the world. Are 3nm, 2nm, and 1nm nodes next? Even if there is enough money to invest in research and development, the physical limit of Moore's Law has already seen its end, so where is the future of semiconductor manufacturing?


2.5D and 3D stacked packaging technology has become a "heterogeneous integration" solution generally recognized by foundries, IDMs, and packaging and testing vendors, because it can integrate dies of different process nodes, and can meet the needs of high, medium and low-end markets. Requirements of various components. Through silicon via (TSV) is one of the earliest stacking technologies. At present, the packaging technology competition from TSV to wafer-level stacking is mainly concentrated between "TSV" and "TSV-less". For high-performance components, the most popular 2.5D and 3D integration technologies are 3D stacked storage TSV and heterogeneous stacked TSV intermediary layers. Foundry manufacturers such as TSMC, UMC and Globalfoundries are leading the development of this technology. IDM manufacturer Intel's Foveros technology is based on "active" TSV intermediary layer and 3D SoC technology. Storage "Big Three" Samsung, SK Hynix and Micron dominate the competition and development of 3D stacked storage.

These dies that are "heterogeneously integrated" in a chip through stacked packaging have different functions and different process nodes. However, if a unified interface standard is used for data communication and transmission, the chip design can be greatly simplified. Manufacturing and packaging. As a result, the chiplet concept came into being and began to be accepted by the semiconductor industry. DARPA of the United States has set up a CHIPS (Universal Heterogeneous Integration and IP Reuse Strategy) project to promote the development of chiplets, and Intel has also opened up its high-end interface bus (AIB) interface to support a wide chiplet ecosystem. TSMC and Arm have cooperated to develop a 7nm chiplet system using Chip-on-Wafer-on-Substrate (CoWoS) packaging technology. It consists of two chiplets. Each chiplet contains 4 Arm Cortex-A72 processors and an on-chip interconnection bus. row. With the development of wafer manufacturing and packaging heterogeneous integration, chiplet may evolve from a concept to a general technology and die form, and even become a new IP in the post-Moore era.

4. Chip "specialization" opens application-oriented customized chip design ideas. AI chips will become a massive data processing accelerator for data centers, terminal equipment and autonomous driving

Google’s TPU is a concrete manifestation of the "Domain-Specific Architecture" promoted by the 2017 Turing Award winners John Hennessy and David Patterson. It is Google’s special needs for its cloud platform, using software, algorithms, and Application-led AI chip development paradigm. The shift from general-purpose CPUs, GPUs, and FPGAs to dedicated SoC and AI accelerator chips is to deal with the massive data processing challenges of various emerging applications, including high-performance computing in data centers, wide and scattered application scenarios of the Internet of Things, as well as autonomous driving and Industry 4.0 Wait for the request to process and make decisions in real time.


Not only are Internet giants such as Google, Amazon, and Alibaba and Hypscaler cloud computing service providers developing their own dedicated chips, but Tesla is also developing its own "Full Self-Driving (FSD)" chips. These non-standard, non-sale chips are customized and developed to meet the specific application needs of these companies, because they cannot buy the chips they want from traditional chip manufacturers. Even the traditional FPGA giant Xilinx has also begun to transform, from a chip to a platform-based company, and its focus will shift to high-performance data centers and specific applications that have strict and flexible requirements for computing. Expand from FPGA chip to software, AI computing power and platform services.

Venture capital (VC) investment in the semiconductor industry has grown rapidly since 2017, and AI chip startups are most favored by VCs. However, in the next 2 to 3 years, these AI unicorns who have received huge financing will have to look for applications everywhere with chips. The Horizon with a financing amount of up to 600 million US dollars began to deepen the field of autonomous driving and AIoT, and Graphcore, which promotes the concept of graphs (graphs, representing knowledge models and applications, all machine learning models are expressed in the form of graphs) is in Its investors Dell EMC and Microsoft have found a place for their IPU. There are many other AI chip startups that are looking for their own "sweet spot."

5. The "openness" of the computing architecture stimulates open-source hardware innovation, and the rapid development of the RISC-V ecosystem impacts the global chip design community and Arm ecosystem

From the perspective of computer instruction set architecture (ISA), x86 and Arm are historical choices, but what follows will be the "Golden Decade of Computer Architecture" declared by Professor David A. Patterson of the University of California, Berkeley. Moore's Law, which has governed the development of integrated circuits for many years, is coming to an end. Von Neumann architecture, which has supported the development of computers for many years, has also begun to highlight its limitations. General-purpose CPUs, GPUs, FPGAs and ASICs all have their own expertise and limitations. On this basis, heterogeneous computing has increased the complexity of computing. To deal with these challenges raised by emerging applications, it is necessary to fundamentally carry out architectural innovations.


RISC-V has set off an upsurge of open source hardware and open chip design. It has now been supported by many large and medium-sized enterprises, scientific research institutions and start-ups around the world. The ecology and community that have grown up around RISC-V have also developed rapidly. RISC-V ISA, core IP, development environment and software tools, and VC are all promoting the further expansion of the RISC-V ecosystem. In the context of the Sino-US technology cold war, the development of China's chip design industry urgently needs an independent and open computing architecture. RSIC-V just caters to this demand. The rapid development in China in just two years seems to have proved.

If PC/server created x86 and smart phone made Arm, then the next AIoT will support RISC-V to become the mainstream computing architecture, and even the mainstream chip design and development trend. Arm has felt the pressure and has begun to make changes, such as opening up customized instructions and opening up collaborative development with industry partners in the Internet of Things and autonomous driving. While the Arm camp was rushed by RISC-V, Arm also began to enter the PC server market. We will see more Arm processors from companies such as Amazon, Huawei and Qualcomm penetrate into traditional x86 territories such as PC computers and servers. .

6. EDA moves to the "cloud" and supports AI, expanding the design scope from chips to systems, thereby improving the consistency of the entire system design

TSMC collaborated with Cadence, Synopsys, Mentor, Amazon AWS and Microsoft Azure to establish a cloud-based virtual design environment (OIP VDE), and successfully taped out the first 64-bit multi-core RISC-V CPU designed in the cloud for SiFive. And completed the physical verification of the 7nm chip on the AMD EPYC processor in just 10 hours. Arm also cooperates with EDA manufacturers to provide its ecological partners with the latest Arm processor cloud design platform, which can now support TSMC 7nm process nodes. EDA going to the cloud is the general trend, and will fundamentally change the chip design process and mode.


Significant progress has been made in applying machine learning to chip design. From signal integrity and power integrity to dividing the product portfolio into system analysis, chip layout, and trusted platform design, AI can set dozens of options in EDA tools , To help accelerate the automation process. Cadence uses data analysis to create a machine learning model for parasitic parameter extraction in the first stage of AI application to accelerate long-term calculations. The next stage of introducing AI into EDA tools will be aimed at layout and routing tools, so that AI can learn from human designers and recommend optimal solutions that can accelerate execution time. There are many in the EDA industry that use machine learning technology to achieve automated decision-making and Opportunity to optimize the overall design process.

The acquisition of Mentor by Siemens also marks the beginning of the expansion of EDA from chip design to system design. Internet giants and system manufacturers buying EDA tools to design chips and systems themselves are also accelerating this expansion trend. With the concept of Digital Twin and Virtual Physical System (CPS) gradually implemented, traditional EDA tools have gradually become an integral part of the entire product life cycle management of smart manufacturing, and the design scope covers electronic, electrical, mechanical and thermal characteristics. . At the same time, signal and power integrity, functional and information security, verification and integration, and manufacturability (DFM) are all shift-left from the system end (far right end), making increasingly complex systems The design is more consistent, many design defects can be found and corrected early, and the product design cycle and development cost are also greatly reduced.

7. The combination of MEMS/sensor "fusion" with AI and edge computing will make mobile phones, cars, factories, cities and homes smarter

Sensors/MEMS play a key role in the process of connecting the analog and digital world. Its perception of the surrounding environment and data acquisition allows us to have an objective and comprehensive understanding of the normal operation of various devices and systems. With the penetration of AI in the Internet of Things and the enhancement of edge computing capabilities, and the popularization of sensors/MEMS in more key applications, its future development trend will follow the six "golden rules": higher accuracy, lower Power consumption, smaller size, higher reliability, higher energy efficiency and smarter.


The three major trends driving the development of the sensor/MEMS market and technology are: smart car-hailing, power and energy management, and the Internet of Things, including the Industrial Internet of Things. According to statistics from Yole Développement, the global MEMS market reached $11.6 billion in 2018 and is expected to continue to grow at a compound annual growth rate (CAGR) of 8.2% from now to 2024. Among them, consumer applications will account for 60% of the MEMS market, automotive applications will account for 20%, and the remaining 20% ​​include applications such as telecommunications, medical, industrial and aviation.

According to the market size and future growth potential, MEMS/sensors can be classified into three categories. The first category includes inertial MEMS, inkjet print heads, optical MEMS, traditional microphones and pressure sensors with a market size of more than US$1 billion but a growth rate of less than 5% CAGR. The current market size is less than US$1 billion but the growth rate is 5-10% CAGR is the second category, including environmental monitoring MEMS, microfluidics, microbolometers, thermopiles, and RF MEMS. 5G is expected to promote new chip requirements for smart phones, and RF MEMS will also be widely used in new base station deployment and edge computing equipment. The third category is the future growth star with a growth rate of more than 15% CAGR, such as new microphones, ultrasonic fingerprint recognition, and oscilloscope measurement.
Sensor Fusion is of great significance in constructing complex systems that perceive the world in digital presentation. The key is to emphasize that the system depends not only on one sensor, but also on multiple sensor inputs. Whether it is a smart phone, an autonomous vehicle, a smart city, a factory of the future, or healthcare, the sensing subsystem usually contains various sensor types that need to measure parameters such as temperature, pressure, proximity, and location, as well as various chemical substances And gas indicators to achieve a closed-loop system that tracks, interprets and feeds back relevant information. Take autonomous vehicles as an example. In order to ensure absolute safety, the integration of camera vision and radar imaging sensors is required to provide drivers and passengers with sufficient confidence.

8. GaN/SiC new material components "replace" silicon components at an accelerated pace, enabling 5G RF, electric vehicles and wireless/fast charging

Gallium nitride (GaN) is a wide band gap (WBG) semiconductor material that can withstand high voltage, high frequency and high temperature operating conditions better than traditional silicon semiconductor materials. 5G communication has strict requirements for high frequency and high efficiency on the RF front end, which is where GaN comes in. According to market research firm Yole Development, the global market for GaN RF components will exceed US$2 billion by 2024, and wireless communications will account for a large portion. In addition, the rapid and efficient charging requirements of automobile electrification and portable electronic products will also drive GaN power components to the mass market, gradually replacing traditional silicon power components.


In the 5G mobile communication system, the data transmission rate of base stations and mobile terminals is faster than that of 4G, and the spectrum utilization rate of modulation technology is higher. This places higher requirements on RF front-end components and modules. The current mainstream silicon Base LDMOS components and gallium arsenide (GaAs) components are inferior to GaN in high frequency characteristics. Therefore, whether it is a silicon substrate or a silicon carbide (SiC) substrate, GaN will achieve rapid development driven by 5G. Although the cost of GaN is still high, some companies are applying low-cost GaN-on-Si to RF components. As manufacturing processes increase and costs decrease, GaN will gradually replace gallium arsenide and LDMOS.

In power management applications, GaN has the following advantages: low conduction loss, high energy efficiency, high power density, and can support higher switching frequencies. According to the forecast of the IHS market research report, the market for GaN power components will grow by more than 30% every year, and the market size is expected to exceed $1 billion by 2027. In addition to the 5G communications market, the automotive and industrial markets are also the main growth areas for GaN power components. Even in the price-sensitive consumer electronics market, GaN has begun to enter and penetrate rapidly, such as low-power fast charging heads, and wireless charging.

9. The prospect of "recovery" in the memory device market stimulates manufacturers to increase research and development of new technologies and processes in order to strive for the next round of peak season demand advantage

Storage chips are highly standardized and cyclical in supply and demand. The market decline in 2019 tends to be flat. Storage manufacturers are optimistic about the prospects for recovery in 2020, and they are trying to increase the research and development and promotion of new technology processes to replace old products with new ones. Occupy an advantageous position in the next round of market competition. Micron, Samsung, SK Hynix and Intel are all working hard on new storage process technologies, and China's Yangtze River Storage and Hefei Changxin are also closely following.

The 3D stacking of NAND flash memory is the research and development focus of major storage manufacturers. Samsung’s mainstream 3D NAND products are currently 64-layer, and its sixth-generation 3D NAND flash memory with more than 100 layers has also been mass-produced. Micron Technology has successfully taped out 128-layer 3D NAND, and mass production is expected in 2020, which can greatly reduce the cost per bit. SK Hynix’s current mainstream 3D NAND flash memory is 72 layers, and the next generation stack will exceed 90 layers, and the next stage will be 128 layers, and by 2021 it will exceed 140 layers. YMTC's 64-layer 3D NAND with Xtacking architecture has also been mass-produced.


DRAM is more difficult to stack layers. Manufacturers can only improve performance and efficiency by reducing circuit spacing. The current focus of competition is on the 10nm process. The 10nm-level DRAM process is divided into 1st generation (1x), 2nd generation (1y) and 3rd generation (1z). After SK Hynix launched the second generation 10nm-level process (1y nm), it announced the successful development of the third generation (1z). nm) 16G DDR4 DRAM. Samsung Electronics' 1z process DRAM has also achieved mass production, and Micron has also begun mass production of 1z nm 16Gb DDR4, which has a higher density than the previous generation and a 40% reduction in power consumption. Hefei Changxin also announced the start of production of DRAM memory chips. Its 8Gb DDR4 chips adopt 19nm (1x) process, which is basically in sync with the international mainstream DRAM process.

Micron Technology launched the ultra-high-speed SSD hard disk X100 based on 3D XPoint technology, which is a solution for locking storage and memory-intensive applications in data centers. It is said that 3D XPoint technology introduces a new level in the memory-to-storage hierarchical structure, with larger capacity and better durability than DRAM, as well as higher durability and stronger performance than NAND. Samsung is focusing on the development of a new generation of embedded non-volatile memory eMRAM technology, has mass-produced the first commercially available eMRAM product, and will use the FD-SOI 28nm process to produce 1G capacity eMRAM test chips.

10. High-performance ``analogous'' technology boosts medical digitization, automotive ADAS and autonomous driving

The overall trend of vehicle electrification is that the proportion of electronic components and electrical components is increasing. As the penetration rate of ADAS continues to rise and eventually transition to fully autonomous driving, the demand for semiconductors in the automotive transportation industry continues to grow. It is expected that vehicles will be used in 2022. The semiconductor market will reach 48 billion U.S. dollars, of which analog RF products account for up to 69%. Automotive analog RF is roughly divided into two categories: wireless connection and vehicle radar. Vehicle-mounted radar systems have almost become the standard configuration of today's mid-to-high-end vehicles. In the future, each vehicle will be equipped with up to 7 to 12 radar systems. The popularization of 5G networks will also increase the data transmission rate of connected vehicles, and the demand for corresponding wireless connection components and modules will also increase. Some "special process" foundries (such as TowerJazz and Hua Hong Hongli) and semiconductor component design companies are making technological development and manufacturing process adjustments in response to the trend of automotive electronics.


The medical Internet of Things (IoMT) ecosystem based on mobile Internet and Internet of Things technology will include millions of low-energy and high-performance medical health monitoring devices, clinical wearable devices, and remote sensors. Doctors rely on these instruments to continuously collect patient data indicators, such as vital signs, physical activity and other information, to effectively manage or adjust treatment plans. Ordinary people can also use small portable and intelligent medical equipment and health management equipment to monitor vital signs such as exercise, heart rate, blood pressure, blood sugar, sleep, etc., to help detect their own diet and fitness status, and prevent the occurrence of diseases .

In the electronic design of the medical imaging field, the analog data acquisition front-end is generally used for signal conditioning, and the original imaging data is converted to the digital domain. This has a strong impact on the dynamic range, resolution, accuracy, and accuracy of the data converter (ADC and DAC). Linearity and noise indicators put forward extremely stringent requirements. Analog signal chain products based on various high-performance sensors are playing an increasingly critical role in medical equipment and systems, and high-performance analog technologies are also ushering in a broader development space in the medical industry.

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